Semiconductors

Publications and Presentations About Semiconductors

• February 10, 2025 – IEDM 2025 – TSMC 2nm Process Disclosure – How Does it Measure Up? – we analyze TSMC’s disclosure and then compare it to Intel, and Samsung’s competing processes.
• January 14, 2025 – “Leading Edge Semiconductors – Technology Trends Applied Across all Device Types,”  Semi ISS Conference 2025. In spite of the different requirements for leading edge; DRAM, Logic and NAND, – 3D Scaling, Wafer Bonding, and Molybdenum are being implemented for all three product types.
• June 28, 2024 – VLSI Technology Symposium – Intel describes i3 process, how does it measure up? – an analysis of Intel’s VLSI Technology Symposium paper discussing their i3 process.
• April 24, 2024 – Intel High NA Adoption – a summary and analysis of a briefing Intel gave on their High NA EUV progress.
• March 13, 2024 – No! TSMC does not Make 90% of Advanced Silicon – an analysis of worldwide advanced silicon capacity and TSMC’s role in advanced silicon production.
• February 23, 2024 – Intel Direct Connect Event – a write up of Intel’s first Intel Foundry Service event.
• February 19, 2024 – ISS 2024 – Logic 2034 – Technology, Economics, and Sustainability – a write up of my presentation at ISS 2024.
• January 17, 2024 – IEDM 2023 – Imec CFET – a write up of Imec’s paper on CFETs from IEDM 2023.
• January 9, 2024 – “Logic 2034 – Technology, Economics, and Sustainability,” ISS 2024. Contact SEMI for access.
• January 9, 2024 – IEDM 2023 – Modeling 300mm Wafer Fab Carbon Emissions – a write up of my presentation at IEDM 2023.
• December 13, 2023 – “Modeling 300mm Wafer Fab Carbon Emissions, (invited)” IEDM 2023. Contact the IEEE for access.
• November 16, 2023 – “Semiconductor Technology Trends and the Impact on Materials,” Electronics Specialty Gas Conference, 2023, contact Linx Consulting for access.
• October 19, 2023 – IEDM 2023 is Coming in December – one of the industries premier technology conference is taking place in December.
• September 8, 2023 – SMIC N+2 In Hauwei Mate Pro 60 – a discussion of SMIC’s N+2 process and how it fits in versus TSMC logic processes.
• July 27, 2023 – ASML Update SEMICON West 2023 – a discussion of ASML exposure system updates from the SPIA Advanced Lithography Conference and Semicon West.
• June 21, 2023 – Intel Foundry Model Webinar – a write up of the webinar Intel held today to discuss their internal foundry model.
• June 12, 2023 – VLSI Symposium – Intel PowerVia Technology – a discussion of Intel’s backside power delivery technology.
• June 11, 2023 – VLSI Symposium Workshop paper, Jeffrey Smith, Jonathan Cobb, Plamen Asenov, Yves Saad, Scotten Jones, Shela Aboud, Ricardo Borges, David Power, “Design technology co-optimization solutions for enhanced PPAC for CFET device architectures,” Contact the IEEE for access.
• June 7, 2023 – Applied Materials Announces “EPIC” Development Center – a discussion of Applied Materials recently announced new development center and collaboration model. 
• May 17, 2023 – SPIE 2023 – imec Preparing for High-NA EUV – a summary of imec presentations at the SPIE 2023 Advanced Lithography Conference. 
• April 6, 2023 – TSMC has spent a lot more money on 300mm than you think – an analysis of TSMC’s 300mm fabs capital investment.
• March 14, 2023 – SPIE Advanced Lithography Conference 2023 – AMAT Sculpta® Announcement – a discussion of AMAT’s recent Sculpta tool announcement. 
• February 20, 2023 – IEDM 2023 – 2D Materials – Intel and TSMC – a write up of seven papers on 2D materials presented at IEDM by TSMC and Intel.
• January 18, 2023 – IEDM 2022 – Imec 4 Track Cell – a write up of Imec’s paper on interconnect to enable a 4 track logic cell.
• January 2, 2023 – IEDM 2022 – TSMC 3nm – a write up of two articles TSMC presented on 3nm at IEDM 2022.
• December 26, 2022 – IEDM 2022 – Ann Kelleher of Intel – Plenary Talk – a write up of Ann Kelleher’s plenary talk at IEDM. 
• September 7, 2022 – Does SMIC have 7nm and if so, what does it mean – a write up of the recent disclosure that SMIC has a 7nm process and a discussion of what it means.
• August 3, 2022 – SEMICON West 2022 and the Imec Roadmap – observations about SEMICON West and Imec’s Technology Formation.
• June 28, 2022 – Imec Buried Power Rail and Backside Power Delivery at VLSI – a write up of work Imec presented at the VLSI conference.
• June 24, 2022 – ASML EUV Update at SPIE– a write up of ASML’s EUV system presentations at SPIE.
• June 13, 2022 – Intel 4 Deep Dive – a discussion of Intel’s Intel 4 process being presented at the VLSI Technology Conference.
• May 21, 2022 – Intel to present Intel 4 process at the VLSI Technology Symposium – a write up of some pre-presentation information on a paper Intel will give at the VLSI Technology Symposium.
• April 27, 2022 – SPIE invited paper, V. Moroz, X.-W. Lin, A. Svizhenko, P. Stopford, J. Huang, L. S. Melvin III, K. Ramkumar, R. Hentschke, K. Taravade, and S. Jones, “Material-Guided Patterning for Stacked Transistor Technologies,” SPIE Advanced Lithography Conference (2022). Contact SPIE to get access.
• April 15, 2022 – The Lost Opportunity for 450mm – the semiconductor industry is expected to double in the next 10 to 12 years, 450mm would have made that much easier but is now a lost opportunity.
• April 13, 2022 – Intel and the EUV Shortage – an analysis of EUV exposure tool supply and demand.
• April 11, 2022 – Can Intel Catch TSMC in 2025 – a write up of our SEMI ISS 2022 presentation “Logic Leadership 2025,”
• April 5, 2022 – ISS Paper, Scotten W. Jones, “Logic Leadership 2025” presented at ISS.
• March 25, 2022 – SEMI EMG presentation, Scotten W. Jones, “Horizontal Nanosheets Materials Impact and Roadmap”.
• March 23, 2022 – The EUV Divide and Intel Foundry Services – some thoughts about why Intel is getting into foundry and the looming EUV tool shortage.
• February 21, 2022 – Intel 2022 Investors Meeting – a write up of the process technology and manufacturing disclosures from Intel’s investors meeting. 
• January 27, 2022 – Samsung Keynote at IEDM – a write up Samsung’s keynote address at IEDM 2021.
• January 10, 2022 – IBM at IEDM – a write up and analysis of three papers IBM presented at IEDM. 
• December 14, 2021 – Intel Discusses Scaling Innovations at IEDM – a discussion of two papers Intel presented on logic scaling at IEDM 2021.
• December 13, 2021 – IEDM invited paper, X.-W. Lin, V. Moroz, X. Xu, Y. Gao, D. Rennie, P. Asenov, S. Smidstrup, D. Sherlekar, Z. Qin, T. Fang, J. Lee, M. Choi, and S. Jones, “Heterogeneous Integration Enabled by the State-of-the-Art 3DIC and CMOS Technologies: Design, Cost, and Modeling,” IEDM (2021). Contact the IEEE to get a copy of the paper.
• October 13, 2021 – SISPAD – Cost Simulations to Enable PPAC Aware Technology Development – a write up of my keynote address at SISPAD.
• October 13, 2021 – TSMC Arizona fab cost revisited – an analysis of the cost for TSMC to operate a fab in Arizona versus their fabs in Taiwan.
• September 29, 2021 – SISPAD paper and Keynote address, Scotten W. Jones,” Cost Simulations to Enable PPAC Aware Technology Development” SISPAD (2021). Contact the IEEE to get a copy of the paper.
• July 27, 2021 – Intel Accelerated – an analysis of Intel’s Intel Accelerated announcement.
• July 19, 2021 – VLSI Technology Symposium – Imec Alternate 3D NAND Word Line Materials – a write up of Imec’s work on alternative word line materials for 3DNAND.
• July 10, 2021 – SPCC Conference paper, Scotten W. Jones, “The Evolution of Leading Edge Technology and the Impact on Cleans,” SPCC (2021). Paper is available to attendees only.
• July 6, 2021 – VLSI Technology Symposium – Imec Forksheet – a write up of Imec’s Forksheet paper from the VLSI Technology Symposium.
• July 2, 2021 – VLSI Symposium – TSMC and Imec on Advanced Process and Devices Technology Toward 2nm – a write up of the TSMC and Imec short course advanced logic presentations.
• May 9, 2021 – Is IBM’s 2nm Announcement Actually a 2nm Node? – an analysis of the recent IBM “2nnm” announcement and how it compares to Samsung and TSMC 3nm and 2nm node.
• May 2, 2021 – Ireland – A Model for the US on Technology – a discussion of Ireland’s proactive approach to encouraging high tech investment including Intel.
• April 26, 2021 – How to Spend $100 Billion Dollars in Three Years – an analysis of TSMC’s recent announcement that they will spend $100 billion dollars on capital between 2021, 2022 and 2023.
• April 8, 2021 – SPIE 2021 – Applied Materials – DRAM Scaling – a discussion of Applied Materials paper from the SPIE Advanced Lithography Conference in February, on DRAM scaling.
• April 6, 2021 – Kioxia and Western Digital and the current Kioxia IPO/Sale rumors – a discussion of Kioxia and Western Digitals Flash technology and industry position.
• March 24, 2021 – Intel’s IDM 2.0 – an analysis of Intel’s issues over the last several years and the IDM 2.0 announcement from the company.
• March 17, 2021 – SPIE 2021 – ASML DUV and EUV Updates – at the SPIE Advanced Lithography Conference in February, ASML gave an update on their latest DUV and EUV systems, this article summarizes the presentations.
• March 21, 2021 – TSMC plans six wafer fabs in Arizona – a discussion of recent rumors around TSMC’s plan for their Arizona fab site.
• February 15, 2021 – Intel Node Names – an analysis of how Intel nodes compare to TSMC nodes and a proposed method for renaming Intel nodes to match TSMC’s nodes.
• January 15, 2021 – ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era – a write up of the talk our president Scotten W. Jones gave at ISS 2021.
• January 8, 2021 – IEDM 2021 – Imec Plenary Talk – a summary of Imec’s very informative plenary talk at IEDM in December 2020, on the current status and future of leading edge semiconductor technology.
• December 15, 2020 – IEDM invited paper, V. Moroz, X.-W. Lin, P. Asenov, D. Sherlekar, M. Choi, L. Sponton, L. S. Melvin III, J. Lee, B. Cheng, A. Nannipieri, J. Huang, and S. Jones, “DTCO Launches Moore’s Law Over the Feature Scaling Wall,” IEDM (2020). Contact the IEEE to get a copy of the paper.
• December 2, 2020 – No Intel and Samsung are not passing TSMC – a comparison of Intel, Samsung and TSMC from 14nm down to 3nm. This is in answer to a recent misleading post from Seeking Alpha.
• November 6, 2020 – Leading Edge Foundry Wafer Prices – a discussion of a recent report on foundry wafer selling prices.
• September 13, 2020 – VLSI Symposium 2020 – Imec Monolithic CFET – Imec presented a new approach to fabricate CFETs at the Imec Technology Forum.
• August 17, 2020 – SEMICON West – Applied Materials Selective Gap Fill Announcement – at SEMICON West Applied Materials announced a tool to produce low resistance vias, this article summarizes the development.
• July 30, 2020 – Imec Technology Forum and ASML – a summary of presentations from the recent Imec Technology Forum.
• July 27, 2020 – VLSI Symposium 2020 – Imec Buried Power Rail – at the 2020 VLSI Technology Symposium Imec presented on Buried Power Rails and this article summarizes that paper.
• June 25, 2020 – Key Semiconductor Conferences Go Virtual – the 2020 Symposium on VLSI Technology and Circuits went virtual last week and IEDM will be virtual in December. In this article we discuss what the virtual conference experience is like.
• May 25, 2020 – Effect of Design on Transistor Density – how design decisions effect transistor density and why you can’t compare transistor density on products to draw conclusions about processes.
• May 19, 2020 – Cost Analysis of the Proposed TSMC US Fab – an analysis of the capital and wafer costs for TSMC’s proposed US fab.
• April 29, 2020 – Can TSMC Maintain Their Process Technology Lead – a comparison of Intel, Samsung and TSMC out to 3nm.
• April 20, 2020 – SPIE 2020 – ASML EUV and Inspection Update – a summary of the papers presented by ASML at the SPIE Advanced Lithography Conference.
• March 30, 2020 – SPIE 2020 – Applied Materials Material-Enabled Patterning – a write up of new patterning techniques announced by Applied Materials at the SPIE Advanced Lithography Conference.
• March 4, 2020 – LithoVision – Economics in the 3D Era – LithoVision was canceled this year but I had already finished my presentation, this is a write up of the presentation I had planned to give.
• January 20, 2021 – IEDM 2019 – Imec – interviews with 3 Imec researchers with a general discussion of the status of memory and then specific discussions of five papers Imec presented.
• January 8, 2020 – IEDM 2019 – IBM and Leti – a summary of horizontal nanosheet papers presented by IBM and Leti at IEDM.
• December 23, 2019 – IEDM 2019 – Applied Materials Panel Recap – a summary of the Applied Materials panel: “The Future of Logic: EUV is Here, Now What?”.
• December 16, 2019 – IEDM 2019 – TSMC 5nm Process – an analysis of TSMC’s 5nm paper at IEDM with a summary of what they disclosed as well as the results of our own investigation into the process.
• August 21, 2019 – Semicon West 2019 – Day 4 – Soitec – a write up of an interview with Soitec’s CEO from Semicon West 2019. 
• August 9, 2019 – 300mm Fab Watch 2019!– an article from Daniel Nenni of SemiWiki discussing our 300mm Watch product.
• July 30, 2019 – SEMICON West 2019 – Day 3 – GLOBALFOUNDRIES – on the third day of Semicon I got to sit down with Gary Patton the CTO of GLOBALFOUNDRIES and get an update on the company.
• July 19, 2019 – SEMICON West 2019 – Day 2 – a write up of the second day of Semicon West with a focus on an Applied Materials announcement and joint Leti-Fraunhofer press conference.
• July 15, 2019 – SEMICON West 2019 – Day 1 – Imec – a write up of the first day of Semicon West and the Imec Technology Forum.
• June 27, 2019 – SPIE Advanced Lithography Conference – Imec design papers – a summary of process design papers presented by imec at the SPIE Advanced Lithography Conference.
• May 3, 2019 – TSMC and Samsung 5nm Comparison – a summary of the known and estimated dimensions and density for the Samsung and TSMC 5nm processes.
• April 19, 2019 – SPIE Advanced Lithography Conference – Imec and Veeco on EUV – a summary of Imec’s recent work on EUV.
• March 22, 2019 – SPIE Advanced Lithography Conference – ASML EUV Update– updates from ASML on their 0.33NA and 0.55NA EUV systems.
• March 5, 2019 – SPIE Advanced Lithography Conference 2019 Overall Impressions – a summary of what I saw and heard at the SPIE Advanced Lithography Conference.
• February 24, 2019 – LithoVision 2019 – Semiconductor Technology Trends and their impact on Lithography – a write up of my talk from Nikon’s LithoVision Conference.
• January 3, 2019 – 2018 Semiconductor Year in Review – a summary of what we believe to be the most important semiconductor stories of 2018.
• December 28, 2018 – IEDM 2018 Imec on Interconnect Metals Beyond Copper– a discussion of alternate metals to replace copper. 
• December 11, 2018 – IEDM 2018 ASML EUV Update – a discussion of ASML’s paper on EUV from IEDM.
• October 2, 2018 – GLOBALFOUNDRIES Pivot Explained – a discussion of GLOBALFOUNDRIES decision to discontinue 7nm development.
• September 6, 2018 – IEDM Preview 2018 – a preview of the International Electron Devices Meeting to be held in December.
• September 4, 2018 – Why are NAND Flash Fabs so Huge – a blog by Jim Handy quoting data from IC Knowledge.
• August 13, 2018 – SEMICON West – Leading Edge Lithography and EUV – a summary of recent developments in EUV and leading edge lithography.
• July 23, 2018 – FDSOI Status and Roadmap – summary of the current status of FDSOI and where we think the technology is going in the next few year. 
• July 22, 2018 – SEMICON West – Soitec is becoming a key enabler – a discussion of Soitec and their role in enabling the growth of FDSOI.
• July 16, 2018 – VLSIT Conference – imec on CFETs – a discussion of imec ‘s VLSIT paper on CFETs.
• July 2, 2018 – IITC – Imec Presents Copper, Cobalt and Ruthenium Interconnect Results – a summary of imec’s IITC paper comparing various interconnect options.
• June 27, 2018 – Imec technology forum 2018 – the future of scaling – a discussion of scaling alternatives discussed at the imec technology forum held in Belgium in May 2018
• June 25, 2018 – 7nm, 5nm and 3nm Logic, current and projected processes – a summary of what we currently know about 7nm, 5nm and 3nm logic processes.
• June 5, 2018 – Imec technology forum 2018 – the future of memory – a summary of presentations and interview at the imec technology forum about memory.
• May 31, 2018 – Imec Technology Forum: Gary Patton of GLOBALFOUNDRIES – a summary of an interview with Gary Patton and his presentation at the imec technology forum.
• May 17, 2018 – IC Knowledge President Shares View of Semiconductor Landscape at Nikon Symposium – a summary Scotten Jones’ Litho Vision 2018 presentation published in Nikon Review.
• May 4, 2018 – Samsung 10nm 8nm and 7nm at VLSIT – a summary of information about Samsung’s 10nm, 8nm and 7nm processes.
• April 30, 2018 – Intel 10nm Yield Issues – a discussion of Intel’s recent disclosure that they are pushing out 10nm volume production to 2019 due to yield issues.
• April 9, 2018 – SPIE Advanced Lithography 2018 – ASML Update on EUV – an update on EUV based on ASML’s papers t the SPIE Advanced Lithography Conference.
• April 9, 2018 – Cleaning Trends for Advanced Nodes – a write up of our president Scotten W. Jones’ presentation at the business of cleans conference.
• March 16, 2018 – Samsung is Starting 7nm Production with EUV in June – an analysis of recent news announcements about Samsung’s EUV status.
• March 12, 2018 – Leading Edge Logic Landscape 2018 – a comparison of the leading edge logic technologies from GLOBALFOUNDRIES, Intel, Samsung and TSMC.
• March 7, 2018 – SPIE Advanced Lithography 2018 – EUV Status – a summary of selected papers from the 2018 SPIE Advanced Lithography Conference.
• February 25, 2018 – LithoVision 2018 The Evolving Semiconductor Technology Landscape and What it Means for Lithography – Scotten Jones presented at Nikon’s Litho Vision and this article is a write up of the talk.
• February 12, 2018 – IEDM 2017 – Leti Gate-All-Around Stacked-Nanowires – Leti has been a pioneer in gate-all around and at IEDM they presented an overview of the technology. 
• January 26, 2018 – IEDM 2017 – Controlling Threshold Voltage with Work Function Metals – a discussion of the recent transition to work function metals for threshold voltage control for leading edge logic processes.
• January 18, 2018 – ISS 2018 – The Impact of EUV on the Semiconductor Supply Chain – a write up of a paper presented by Scotten Jones at ISS 2018 analyzing how EUV will effect the industry.
• January 4, 2018 – IEDM 2017 – imec Charting the Future of Logic – a summary of imec’s logic presentations at IEDM.
• December 17, 2017 – IEDM 2017 – Intel Versus GLOBALFOUNDRIES at the Leading Edge – a discussion of Intel’s 10nm and GLOBALFOUNDRIES 7nm process papers delivered at IEDM.
• October 20, 2017 – GLOBALFOUNDRIES RF Leadership – a detailed review of the requirements for various RF applications and GLOBALFOUNDRIES extensive set of RF focused process options.
• October 20, 2017 – IEDM 2017 Preview – a preview of the upcoming IEDM conference.
• September 28, 2017 – GLOBALFOUNDRIES is hitting on all cylinders – a review of the GLOBALFOUNDRIES Technology Conference 2017.
• August 11, 2017 – SEMICON West – EUV Readiness Update – the current status of EUV based on presentations and interviews at SEMICON West.
• July 21, 2017 – SEMICON West – The FDSOI Ecosystem – a discussion of the FDSOI Ecosystem including information from interviews and presentations at SEMICON West.
• July 15, 2017 – Standard Node Trend – an analysis of how node names compare to a variety of physical features.
• July 5, 2017 – Exclusive – GLOBALFOUNDRIES disclose 7nm process detail – in an exclusive interview GLOBALFOUNDRIES has disclosed the details of their 7nm process.
• June 30, 2017 – 3D NAND Myths and Realities– an analysis of 3D NAND technologies and costs.
• June 9, 2017 – Samsung Details Foundry Roadmap – an article covering the details of Samsung’s recently announced foundry roadmap.
• April 19, 2017 – SPIE 2017 – ASML Interview and Presentations – An article summarizing ASML’s presentations at the SPIE Advanced Lithography Conference plus and interview with Mike Lercel of ASML at the same conference.
• April 13, 2017 – SPIE 2017 ASML and Cadence EUV impact on place and route – ASML and Cadence have teamed up to offer improved tools to evaluate deign impacts on lithography and yields.
• April 11, 2017 – SPIE 2017: Irresistible Materials EUV Photoresist – Irresistible Materials has developed a new type of EUV photoresist with the potential to provide improved performance.
• April 7, 2017 – 14nm 16nm 10nm and 7nm – What we know now – A comparison of the leading-edge logic processes by company. 
• April 3, 2017 – Shootout at 22nm – a discussion and comparison of the 22nm processes from GLOBALFOUNDRIES, TSMC and Intel. 
• March 29, 2017 – Intel Manufacturing Day: Nodes must die, but Moore’s Law lives! – a discussion of the issues with node names and the status of Moore’s law.
• March 3, 2017 – SPIE 2017: EUV Readiness for High Volume Manufacturing – a summary of the EUV readiness for HVM presentations during the first day of the SPIE Advanced Lithography Conference.
• February 28, 2017 – An Steegen ISS Talk and Interview – Patterning Options for Advanced Nodes – a discussion of An Steegen’s presentation at ISS 2017.
• February 7, 2017 – Scott Jones ISS Talk – Moore’s Law Lives – At ISS 2017 our president Scotten W. Jones gave a talk on advanced logic. This article summarizes that talk.
• January 25, 2017 – ISS Gary Patton Keynote: FD-SOI, FinFETS, and Beyond! – Gary Patton CTO of GLOBALFOUNDRIES keynote and interview at ISS.
• December 26, 2016 – The 2017 Leading Edge Semiconductor Landscape – an analysis and comparison of leading edge logic processes out to the 5nm node.
• December 21, 2016 – IEDM 2016 – Marie Semeria LETI Interview – an interview with Leti CEO Marie Semeria covering developments in FDSOI and Horizontal nanowires.
• December 17, 2016 – IEDM 2016 – 7nm Shootout – a comparison and analysis of the TSMC and Global Alliance 7nm presented at IEDM 2016.
• December 16, 2016 – IEDM 2016 – GLOBALFOUNDRIES 22FDX Update – an update on GLOBALFOUNDRIES 22FDX process progress since I interviewed them at IEDM 2015.
• December 13, 2016 – Advanced Semiconductor Process Cost Trends – an analysis of cost by node for advanced foundry processes.
• October 19, 2016 – Soitec – Enabling the FDSOI Revolution – a blog discussing the substrates used for FDSOI processes.
• September 26, 2016 – The Status and Future of FDSOI – a comparison of FDSOI processes by company and year and how they compare to FinFET processes. 
• September 19, 2016 – GLOBALFOUNDRIES Extends the FDSOI Roadmap – a discussion of GLOBALFOUNDRIES recent 12nm FDSOI announcement including an interview with Greg Bartlett, GF Senior Vice President for the CMOS Business Unit .
• September 3, 2016 – The 2016 Leading Edge Semiconductor Landscape – a comparison of the leading edge logic processes at GLOBALFOUNDRIES, Intel, Samsung and TSMC.
• August 14, 2016 – SEMICON West – Global Foundries Update – an interview with Gary Patton, CTO of GLOBALFOUNDRIES.
• August 2, 2016 – SEMICON West – Harry Levinson and Mike Lercel Interview – an interview with two leading lithography experts.
• July 28, 2016 – SEMICON West – Leti FDSOI and IOT, status and roadmap– an interview with Leti CEO Marie Semeria.
• July 22, 2016 – IMEC Technology Forum at SEMICON – Coventor could save you billions! – Coventor presented at the IMEC Technology Forum at SEMICON and we also interviewed their CTO David Fried.
• July 21, 2016 – IMEC-Horizontal Nanowires for 5nm at the VLSI Technology Symposium – this article is based on the paper IMEC presented and an interview with Dan Mocuda of IMEC.
• July 13, 2016 – Technology and Cost Trends at Advanced Nodes – a presentation examining Logic and Memory trends at advanced node.
• July 7, 2016 – SEMICON West Preview – a discussion of what we plan to cover at SEMICON West next week.
• June 7, 2016 – IMEC Technology Forum (ITF) – Secrets of Semiconductor Scaling – An Steegen’s presentation and my follow up interview with her. 
• June 2, 2016 – IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward– Gary Patton’s presentation and my follow up interview with him.
• May 28, 2016 – IMEC Technology Forum (ITF) – EUV When, Not If – a summary of what I learned about EUV at the ITF.
• May 25, 2016 – IMEC Technology Forum (ITF) – IC Innovation – an article discussing Luc Van Den Hove’s talk at the ITF.
• May 7, 2016 – 3D NAND – Moore’s law in the third dimension – an article discussing 3D NAND technology and what it really means. 
• April 12, 2016 – EUV is coming but will we need it? – an article discussing possible logic technologies that may not need EUV.
• March 25, 2016 – 10nm SRAM Projections – Who will lead – an article discussing projected 10nm logic processes.
• March 15, 2016 – SPIE – Interview with Greg Mcintyre of IMEC – an interview with Greg Mcintyre the director of patterning at IMEC.
• March 10, 2016 – Intel EUV Photoresist Progress and ASML High NA EUV – a blog about papers presented during the third and fourth days of the SPIE Advanced Lithography Conference.
• February 29, 2016 – ASML and IMEC EUV Process – a blog covering EUV announcements at the second day of the SPIE Advanced Lithography Conference. 
• February 23, 2016 – TSMC and Intel on the Long Road to EUV – a blog covering the first day of the 2016 SPIE Advanced Lithography Conference. 
• January 16, 2016 – ARM on Moore’s Law at 50: Are we planning for retirement – a blog discussing Greg Yeric of Arm’s really good plenary talk from IEDM.
• January 8, 2016 – IEDM Blog’s – Part 7- IMEC Technology Forum – Part 2 – a blog discussing the final two papers presented at the IMEC Technology Forum held Sunday, December 6, 2015 at IEDM.
• January 5, 2016 – IEDM Blog’s – Part 6 – IMEC Technology Forum – Part 1 – a blog discussing the first two papers presented at the IMEC Technology Forum held Sunday, December 6, 2015 at IEDM.
• December 29, 2015 – IEDM Blog’s – Part 5 – Intel and Micron 3D NAND – a blog describing the Intel-Micron 3D NAND technology. 
• December 28, 2015 – IEDM Blog’s – Part 4 – IMEC InGaAs Channel for 3D NAND – a blog describing IMEC’s work on high mobility channels for 3D NAND.
• December 18, 2015 – IEDM Blog’s – Part 3 – Global Foundries 22FDX briefing – during IEDM I got a briefing on the current status of Global Foundries 22FDX process.
• December 16, 2015 – 3D NAND Challenges and Opportunities – a webinar on 3D NAND that we participated in. The webinar was held by Solid State Technology Magazine and sponsored by Air Products.
• December 16, 2015 – Why Did Apple Buy a Fab – a discussion of what Apple might do with the wafer fab they recently purchased.
• December 16, 2015 – IEDM Blog’s – Part 2 – Memory Short Course – the second in a series of articles about IEDM 2015. a summary of the memory short curse held on Sunday at IEDM.
• December 11, 2015 – IEDM 2015 Blog’s – Part 1 – Overview – the first in a series of articles about IEDM 2015. This article is a summary of what we saw and sets the stage for the following articles. 
• December 1, 2015 – Samsung Versus Intel at 14nm – a comparison of the back end pitches and lithography technologies for Intel’s and Samsung’s 14nm process.
• November 11, 2015 – Global Foundries Visit – Part 2 – Waking the Sleeping Giant – we have published part 2 of a blog summarizing visits we made to Global Foundries.
• November 6, 2015 – Global Foundries Visit – Part 1 – It’s All About Execution – we have published part 1 of a blog summarizing visits we made to Global Foundries.
• October 26, 2015 – Global Foundries 14nm Process Update – we have published a blog summarizing a conference call we had with Global Foundries on their 14nm process.
• October 9, 2015 – IMEC and Cadence Disclose 5nm Test Chip – we have published an article summarizing a conference call we had with IMEC and Cadence abut their 5nm test chip.
• September 9, 2015 – 3D Xpoint and the Future of Memory – we have published an analysis of the recent Intel/Micron 3D Xpoint memory disclosure.
• July 21, 2015 – SEMICON West 2015 Recap – Day 1 – Softening Markets, Sub 14nm and 3D NAND – we have published an article discussing day one of SEMICON West.
• July 11, 2015 – Who Needs to Lead at 14, 10 and 7nm nodes – we have published an article discussing the IBM 7nm announcement and what it really means for the leading logic companies.
• July 7, 2015 – SEMICON West Preview – we have published an article discussing what we expect to see at SEMICON West.
• April 22, 2015 – Moore’s Law is dead, long live Moore’s Law – part 5 – we have published a five part analysis of the status and future of Moore’s law.
• April 22, 2015 – Moore’s Law is dead, long live Moore’s Law – part 4 – we have published a five part analysis of the status and future of Moore’s law.
• April 19, 2015 – Moore’s Law is dead, long live Moore’s Law – part 3 – we have published a five part analysis of the status and future of Moore’s law. 
• April 19, 2015 – Moore’s Law is dead, long live Moore’s Law – part 2 – we have published a five part analysis of the status and future of Moore’s law.
• April 15, 2015 – Moore’s Law is dead, long live Moore’s Law – part 1 – we have published a five part analysis of the status and future of Moore’s law. 
• March 30, 2015 – Life Without EUV – we have published an article about day 2 of SPIE.
• March 15, 2015 – SEMI Wafers to Wall street – we have published an article describing the SEMI Wafers to Wall street breakfast.
• February 27, 2015 – EUV Makes Progress and Other News from SPIE – we have published an article about day one of SPIE.
• February 20, 2015 – SPIE Advanced Lithography Preview – we have published a discussion of what we are looking forward to at the upcoming SPIE Advanced Lithography Conference.
• January 28, 2015 – Translating Intel – we have published a discussion of Intel’s usage of multi patterning and air gaps.
• January 7, 2015 – Ion Implant – Its Not Just for Doping Anymore – we have published a discussion of the emerging usage of ion implantation for material modification in integrated circuit fabrication.
• January 6, 2015 – Apples Versus Zebras – we have published a discussion of process density comparisons we have seen others make comparing Intel’s 14nm process to TSMC’s 20nm process. 
• January 1, 2015 – IEDM Advanced CMOS Technology Platform Session – we have published a discussion of the IEDM Advanced CMOS Technology Platform Session.
• November 21, 2014 – Intel 2014 Investor Meeting and 14nm Status – we have published an analysis of information that came out of intel’s investors meeting. 
• September 29, 2014 – Who Will Lead at 10nm? – we have published an analysis of projected 10nm logic processes.
• August 13, 2014 – Intel Versus TSMC 14nm Processes – we have published an article on SemiWiki comparing the known information on the two processes.
• July 22, 2014 – The Leading Edge Foundry Landscape – we have published an article summarizing recent announcements in the foundry space.
• July 20, 2014 – Setting the Record Straight on FD-SOI Costs – we have published a follow-on article to our Is SOI Really Less Expensive article correcting some mischaracterized of our work.
• July 19, 2014 – SEMICON Update: 450mm, EUV, FinFET, and More – we have published an article of observations on the recent Semicon West show.
• July 10, 2014 – Silicon 2020 – 2014 update – an analysis of the Silicon Market in 2002 that we presented to the Silicon Materials Group at Semicon West.
• June 24, 2014 – Is SOI Really Less Expensive – read our cost analysis.
• January 31, 2014 – SOI Future or Flop – an article analyzing the prospects for SOI.
• March 4, 2014 – 450mm Delayed and Other SPIE News – read our news from SPIE
• July 2013 – Strategic Modeling of the ITRS – 2013 Update – presented at SEMICON West to the ITRS steering committee.
• 2012 – Forecasting the 450mm Ramp Up – a white paper describing our work on silicon demand forecasting.
• October 2011 – IC Knowledge President Scotten W. Jones has published a short article in Advanced Substrate News on cost competitiveness of FDSOI for 22nm/20nm logic use. The article is available here.
• July 2011 – FDSOI More Cost Effective for 22nm – IC Knowledge has completed a study for Soitec comparing Fully Depleted SOI (FDSOI) to bulk silicon at 22nm for System On A Chip (SOC) applications. The FDSOI Versus Bulk study found that FDSOI is the more cost effective solution. This study was completed and released in July of 2011.
• November 2010 – A Simulation Study of 450mm Wafer Fabrication Costs – presented at ISMI manufacturing week.
• August 2010 – Cost Modeling of MEMS Systems– presented at COMS in August of 2010.